Upgrade of the acquisition system of the ALICE ZDC at LHC

The main target of ALICE Zero Degree Calorimeters (ZDC) upgrade in view of third LHC run period that will start in 2021 is the improvement of the readout performance, allowing to read out the detector at 100 kHz of Pb-Pb hadronic interactions without dead time. The thesis consists in the evaluation of a digitizer that can match the requirements in terms of time and energy resolution for the operation in ALICE (0.5 ns and 10-15% on a 2.7 TeV neutron, respectively). The new readout system will replace the Charge to Digital Convertes (QDCs) with a system based on a FPGA (Field Programmable Gate Array) combined with a fast FPGA Mezzanine Card (FMC) digitizer with 12 bits and 1GS/s. This system is based on a commercial digitizer that provides an high bandwith from FMC to FPGA and to data acquisition system (DAQ). The FPGA allows a data compression (trigger processing or autotrigger) and waveform analysis (timing and signal integration). The data transmission is based on the new CERN standard link Gigabit Transceivers (GBT). The performance of the acquisition chain were evalueted in the laboratory in Turin and at CERN with physical signals both in proton-proton collisions and in Pb-Pb collisions in parallel to the ALICE data taking. The performance of the digitizer are compared to the present system.